1. Field of the Invention
The present invention relates to a semiconductor device and more particularly, to a semiconductor device which has a first electrode disposed below an interlayer insulator film and a second electrode disposed on the interlayer insulator film and connected to the first electrode through the interlayer insulator film, the first electrode being electrically connected to an active region and the second electrode acting as a bonding pad.
2. Description of the Prior Art
A conventional semiconductor device having the above-described structure is shown in FIGS. 1 and 2, which is disclosed in the JAPANESE NON-EXAMINED UTILITY MODEL PUBLICATION NO. 1-104029.
As shown in FIG. 1, there are a first electrode 53a branched into three portions and a second electrode 55a of a circular shape on the right side, and a first electrode 53b branched into two portions and a second electrode 55b of a circular shape on the left side.
The three branches of the first electrode 53a are electrically connected to a base region 51 of a bipolar transistor formed in a silicon (Si) substrate 56. The base region 51 is formed in an active region of the substrate 56 and is right below the branches of the first electrode 53a.
The two branches of the first electrode 53b are electrically connected to two emitter regions 52, respectively. The emitter regions 52 are formed in the base region 51 and is right below the branches of the first electrode 53b, respectively.
The second electrodes 55a and 55b act as bonding pads for wire bonding, respectively.
As shown in FIG. 2, the second electrode 55a is formed on an interlayer insulator film 54 of silicon dioxide (SiO.sub.2) and the first electrode 53a is formed under the film 54. The protrusion of the second electrode 55a is superposed on the base or root of the first electrode 53a, and at the superposed area, the first and second electrodes 53a and 55a are in contact with each other through a contact hole 58a formed in the interlayer insulator film 54. Thus, the first and second electrodes 53a and 55a are electrically connected with each other.
Similarly, the second electrode 55b on the left side of FIG. 1 is also formed on the SiO.sub.2 interlayer insulator film 54 and the first electrode 53b is formed under the film 54. The protrusion of the second electrode 55b is superposed on the base or root of the first electrode 53b, and at the superposed area, the first and second electrodes 53b and 55b are in contact with each other through a contact hole 58b formed in the interlayer insulator film 54. Thus, the first and second electrodes 53b and 55b are electrically connected with each other.
The second electrode 55a has a plurality of square openings or apertures 57a arranged in a matrix array. The openings 57a act to reduce the parasitic capacitance between the second electrode 55a and a silicon (Si) substrate 56. This is due to the fact that there arises spaces between the second electrode 55a and the substrate 56 and when a bonding wire is bonded to the second electrode 55a by wire bonding, resulting in a reduced contact area therebetween.
The second electrode 55b on the left side of FIG. 1 also has a plurality of square openings or apertures 57b arranged in a matrix array. The openings 57b also act to reduce the parasitic capacitance between the second electrode 55b and the substrate 56.
On the substrate 56, there are provided a thick SiO.sub.2 film 64 with a thickness of about 1.5 .mu.m and a thin SiO.sub.2 film 61 with a thickness of about 700 .ANG.. The thick film 64 is disposed below the second electrode 55a and is produced by low-pressure chemical vapor deposition (LPCVD). The thin film 61 is disposed below the first electrode 53a and is produced by thermal oxidation of the substrate 56.
A silicon nitride (Si.sub.3 N.sub.4 ) film 73 is formed to cover the SiO.sub.2 films 64 and 61, and the first electrodes 53a and 53b are provided on the Si.sub.3 N.sub.4 film 73.
The conventional semiconductor device described above is fabricated by the following process sequence:
First, as shown in FIG. 3A, the Si substrate 56 is oxidized thermally to grow an SiO.sub.2 film 61 with a thickness of about 700 .ANG. on the entire surface of the substrate 56.
Next, an Si.sub.3 N.sub.4 film 71 with a thickness of about 1500 .ANG. is formed on the entirety of the SiO.sub.2 film 71 by LPCVD, and then, the Si.sub.3 N.sub.4 film 71 is patterned by photolithography and etching to selectively remove its part where the surface of the substrate 56 is oxidized in the next process step.
The substrate 56 is thermally oxidized again using the patterned Si.sub.3 N.sub.4 film 71 as a mask so that the SiO.sub.2 film 61 selectively grows to be an SiO.sub.2 film 62 with a thickness of 1.5 .mu.m on the area where the patterned Si.sub.3 N.sub.4 film 71 does not exist. Since the SiO.sub.2 film 61 usually grows both upper and lower directions, the Si.sub.3 N.sub.4 film 71 is lifted at the end of the area, as shown in FIG. 3B. The part of the SiO.sub.2 film 61 under the Si.sub.3 N.sub.4 film 71 does not grow.
The SiO.sub.2 film 62 thus grown is then removed by etching using the patterned Si.sub.3 N.sub.4 film 71 as a mask. Since the SiO.sub.2 film 61 has grown in both the upper and lower directions at the same rate, the surface of the area where the SiO.sub.2 film 62 has been removed is lower than the original surface of the substrate 56 by about 0.75 .mu.m. The state at this time is shown in FIG. 3C.
Subsequently, the substrate 56 is thermally oxidized for a third time to grow an SiO.sub.2 film 73 with a thickness of 700 .ANG. over the substrate 56, and an Si.sub.3 N.sub.4 film 72 with a thickness of about 500 .ANG. is grown on the entirety of the SiO.sub.2 film 73 thus grown by LPCVD, as shown in FIG. 3D.
The Si.sub.3 N.sub.4 film 72 is removed by anisotropic etching. The part of the Si.sub.3 N.sub.4 film 72 disposed under the lifted end of the Si.sub.3 N.sub.4 film 71 is left, as shown in FIG. 3E.
The substrate 56 is then thermally oxidized for a fourth time. Thus, the SiO.sub.2 film 63 on the depressed surface area of the substrate 56 grows selectively to be an SiO.sub.2 film 64 with a thickness of about 1.5 .mu.m. After that, the SiO.sub.2 film 63 and the Si.sub.3 N.sub.4 films 71 and 72 are removed by etching.
The state of this time is shown in FIG. 3G, where the thick SiO.sub.2 film 64 is on the depressed surface area of the substrate 56 and is connected to the thin SiO.sub.2 film 61.
Subsequently, as shown in FIG. 3H, an Si.sub.3 N.sub.4 film 73 with a thickness of about 500 .ANG. is grown over the substrate 56 by LPCVD to cover the SiO.sub.2 films 61 and 64. Then, the first electrodes 53a and 53b are provided on the Si.sub.3 N.sub.4 film 73 by metallization and patterning to be electrically connected with the base region 51 and the emitter regions 52 in the substrate 56 through contact holes (not shown) of the Si.sub.3 N.sub.4 film 73 and the SiO.sub.2 film 61, respectively.
An Si.sub.3 N.sub.4 film 54 with a thickness of about 1 .mu.m is grown over the substrate 56 by LPCVD as an interlayer insulator film and the contact holes 58a and 58b are formed in the Si.sub.3 N.sub.4 film 54.
Finally, the second electrodes 55a and 55b with the square openings or apertures 57a are formed on the Si.sub.3 N.sub.4 interlayer insulator film 54 by metallization and patterning. The second electrodes 55a and 55b are interconnected with the first electrodes 53a and 53b through the contact holes 58a and 58b, respectively.
Thus, the conventional semiconductor device shown in FIGS. 1 and 2 is obtained.
With the conventional semiconductor device described above, there is a problem that the parasitic capacitances between the second electrodes 55a and 55b and the substrate 56 become large, causing deterioration in high-frequency characteristic of the transistor. This problem appears remarkably for an extra high-frequency transistor.
There is another problem that since the contact areas between the bonding wires and the second electrodes 55a and 55b decrease due to the openings 57a and 57b, the bonding wires cannot be bonded with sufficient adhesion strength.
There is still another problem that the openings 57a and 57b tend to be crushed by the pressure on wire-bonding due to the openings 57a and 57b.